Software Workarounds for Hardware Errors: Instruction Patch Synthesis

Due to the ever-increasing complexity of system design, it becomes not uncommon for some design error escaping all verification efforts and settling in final silicon realization. As hardware-based fixing is much more expensive than software-based fixing, this paper proposes a methodology as a first step toward generating software workarounds for erroneous processor designs. A generic formulation is introduced based on Skolem and Herbrand function extraction from quantified Boolean formula solving; reduction techniques are devised to further enhance practicality. Thereby, a program can be recompiled at the assembly code level for correct execution on a buggy processor. Experimental results show the feasibility of the proposed method.