A runtime adaptive H.264 video-decoding MPSoC platform

Due to current and future technology issues, multi-core processing systems are required to provide support for adaptivity to an ever increasing extent. This requirement may descend from demands of fault-tolerance as well as from dynamic Quality-of-Service (QoS) management strategies, depending on the targeted application and power budget. This paper presents a Network-on-Chip (NoC)-based Multi-Processor System-on-Chip (MPSoC) platform for video decoding applications that provides system adaptivity and reduced power consumption. The platform specifically targets execution of Polyhedral Process Network (PPN) streaming applications. System adaptivity is achieved through support for runtime migration of PPN processes between different tiles, while the power consumption is reduced at runtime through clock gating of inactive processing tiles. The details of how the migration process and clock gating mechanisms are implemented in the platform, both in hardware and middleware, will be presented, along with a characterization of the introduced overhead. In its standard operating mode, the adaptive platform executes a PPN implementation of an H.264 decoder on a stream of video packets coming from a network connection. The network packets are analyzed through a deep packet inspection kernel, OpenDPI, to distinguish between video and special reconfiguration packets. Upon reception of a reconfiguration packet from the network, the adaptive platform performs an on-line reconfiguration that employs runtime PPN process migration to modify the amount of computational resources allocated to execution of the H.264 decoder application. The results demonstrate the feasibility of the approach and its possible applicability to the broader class of PPN streaming applications.