Ternary logic implementation and its applications using CNTFET

The prime motive of this paper is to present the ternary logic as an alternative to binary logic as it is simpler and more energy efficient because the number of gates required will be reduced using ternary logic. Also Carbon nanotube field effect transistors (CNTFET) are used to further upgrade the novel nature of the designs in this paper. The simulation results using Cadence Virtuoso reported that chip delay is reduced by implementing ternary logic using CNTFET's. First a basic gate like inverter is designed. Later on using the same multithreshold logic a novel Analog to Digital Converter (ADC) and a variable Multilevel Voltage Detector are being designed. The novel ADC proposed in this paper uses only 3 CNTFET's in ternary logic which is far ahead in terms of the transistor count than in normal CMOS technology binary logic ADC.