Dynamic task remapping for power and latency performance improvement in priority-based non-preemptive Networks On Chip

In dynamic system-on-chip and multicore CPU applications, the communication patterns between tasks are not easy to characterise in advance. Dynamic task mapping is commonly used in Network-On-Chip (NoC) research in order to redistribute tasks around network processing elements at runtime in response to changes in network loading. Dynamic task mapping is anticipated to become more important as general purpose CPUs become massively multicore and system-on-chip (SoC) designs become more reconfigurable in their application usage patterns. Simultaneously, reducing NoC power consumption is a necessary consideration in the development of future scaleable and energy efficient NoC systems. The work illustrated here uses a dynamic metric which combines contention and the power consumption impact of task remapping decisions, in order to produce a non-preemptive NoC that can deliver as good or better latency as a preemptive NoC in a real application scenario, while reducing overall power consumption. The results obtained show a power consumption reduction of approximately 35% in an application case involving an autonomous vehicle application, and significant reductions in the latency of individual flows.