A DC-9.5GHz noise-canceling distributed LNA in 65nm CMOS

Summary form only given. A low noise amplifier is presented that uniquely achieves wide-band input matching and good low-frequency noise performance at the same time. Its topology is a hybrid of distributed amplifier and a common-source common-gate noise-canceling amplifier. The proof-of-principle prototype in 65nm CMOS operates from DC up to 9.5GHz with more than 12dB gain, achieves a minimum noise figure of 2.8dB, P
_1dB
of -7dBm, IIP
₃
of +4dBm, consumes 18mW from a 1.4V power supply and occupies a total active area of 0.4mm
²
.