A UHF-RFID Transceiver With a Blocker-Canceller Feedback and +30 dBm Output Power

A single chip UHF-RFID transceiver front-end is presented. The chip was designed according to EPCglobal Class-1 Gen-2 and supports both ETSI and FCC requirements. The receiver front end is capable of rejecting self-jammers as large as
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10 dBm with the aid of a feedback loop. The stability and the robustness of the loop and other system requirements are studied. A
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30 dBm class-AB power amplifier (PA) with 28% PAE is also integrated on the chip. The pseudo differential architecture of the PA greatly reduces the injection of the signal into the substrate. A simple model is used to estimate the effect of the substrate noise injection by the PA on the receiving circuit modules and design guides are given. The chip is fabricated in a standard 0.18
$\mu{\rm m}$
CMOS process and occupies an area of 6
${\rm mm}^{2}$
. The receiver sensitivity in the talk mode with the transmission of
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30 dBm output power by the PA is
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87.4 dBm at the presence of
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10 dBm self-jammer. The synthesizer phase noise at 800 kHz offset is better than
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128 dBc/Hz and the PA satisfies the required spectrum mask when outputting an AM modulated signal at the maximum output power. The chip, excluding the PA, draws 51 mA from a 1.8 V supply.