Formal design of an asynchronous DSP counterflow pipeline: a case study in handshake algebra

Two recent developments in asynchronous circuit design are explored by means of a case study (polynomial division) in digital signal processing. The first development is a new formal method, the handshake algebra of M.B. Josephs, J.T. Udding and J.T. Yantchev (1993), that is suitable for specifying, deriving, and verifying circuits that follow a handshaking protocol. The second development is an architecture, counterflow pipelines, that R.F. Sproull (1994) has recently suggested, which is attractive to implement asynchronously.