FPGA Simulation Engine for Customized Construction of Neural Microcircuit

In this poster we describe a platform-based approach for rapid construction of FPGA-based simulation of neural microcircuits composed from integrate-and-fire (IAF) neurons. Our approach exploits high-level synthesis to bypass the high design complexity of RTL coding, and enables automatic optimization and design space exploration. We demonstrate the benefits of this approach by simulating a neural microcircuit that performs oscillatory path integration, which evidence suggests may be a critical building block of the navigation system inside a rodent's brain. Experiments show that our FPGA simulation engine can achieve up to 23x speedup and 450x energy reduction compared to commodity CPU. The methodology described in this paper should be broadly applicable for creating FPGA simulations over a wide range neural microcircuit architectures.