MESFETs modelling for an optimum saturated class A MMIC power amplifier design

This paper describes the modeling of a 0.5 /spl mu/m gate length GaAs MESFET using different models (Tajima and Curtice Cubic) and different experimental characterization techniques (pulsed and continuous). The models characteristics are compared with experiments. Discussion on the best modeling approach for the design of saturated class A power amplifiers is presented. For this purpose we have designed and tested a 3 V bias, 100 mW output power at 2 GHz monolithic power amplifier. All matching and bias elements are on-chip. The matching networks topology and design take into account the fabrication dispersion.