PNOC: Implementation on Verilog for FPGA

Network on Chip (NoC) architectures provide a very efficient means for performance enhancement in digital circuits. The paper describes a NoC implementation that is specifically targeted towards FPGA based designs. Our implementation is based on a lightweight circuit-switched architecture called programmable NoC (PNoC). It is captured in the Verilog hardware description language and is implemented using the Xilinx Virtex-II pro FPGA (XC2Vp30-7) device at 126 MHz. The proposed architecture allows parametrization at the compile time for the number of nodes and amount of data. Moreover, experimental results have confirmed that the proposed implementation is the most efficient one in terms of performance.