High-$\kappa~{\rm Eu}_{2}{\rm O}_{3}$ and ${\rm Y}_{2}{\rm O}_{3}$ Poly-Si Thin-Film Transistor Nonvolatile Memory Devices

In this paper, we have successfully fabricated low-temperature polycrystalline silicon thin-film transistor (LTPS-TFT) nonvolatile memory devices employing high-κ Eu
₂
O
₃
and Y
₂
O
₃
films as the charge trapping layer. The LTPS-TFT memory device uses band-to-band tunneling-induced hot hole injection and gate Fowler-Nordheim injection as the program and erase methods, respectively. Compared with the Y
₂
O
₃
film, the LTPS-TFT memory device using an Eu
₂
O
₃
charge-trapping layer exhibited a lower subthreshold swing and a larger memory window, a smaller charge loss, and a better endurance performance, presumably because of the higher charge-trapping efficiency of the Eu
₂
O
₃
film.