Extraction and Analysis of Interface States in 50-nm nand Flash Devices

A method to extract the interface states (
N
_it
) located in the center area (center
N
_it
) and the
N
_it
located in the corner region (corner
N
_it
) of NAND Flash devices is presented in this paper. This
N
_it
extraction method is based on a careful combination of charge-pumping current data, technology computer-aided-design simulation results, and the “control gate (CG)-modulated corner effect,” where “CG-modulated corner effect” refers to the fact that the electron density in the corner region of the transistor is greatly affected by the bias applied to CG. Using this
N
_it
extraction method, the amounts of center
N
_it
and corner
N
_it
of a given NAND Flash device can be analyzed. In addition, among devices with various widths of active area, the narrower width device showing worse corner
N
_it
can be demonstrated. Furthermore, the generation of center
N
_it
and corner
N
_it
for a device under program/erase cycle stress is explored. Our
N
_it
extraction method will be useful to analyze not only the characteristics of fresh NAND Flash devices but also the reliability of aged NAND Flash devices.