High bandwidth 0.35μm CMOS transimpedance amplifier

A transimpedance amplifier (TIA) has been designed in a 0.35 μm digital CMOS technology for Gigabit Ethernet. It is based on the structure proposed by Mengxiong Li [1]. This paper presents an amplifier which exploits the regulated cascode (RGC) configuration as the input stage with an integrated optical receiver which consists of an integrated photodetector, thus achieving as large effective input transconductance as that of Si Bipolar or GaAs MESFET. The RGC input configuration isolates the input parasitic capacitance including photodiode capacitance from the bandwidth determination better than common-gate TIA. A series inductive peaking is used for enhancing the bandwidth. The proposed TIA has transimpedance gain of 51.56 dBΩ, and 3-dB bandwidth of 6.57 GHz with two inductor between the RGC and source follower for 0.1 pF photodiode capacitance. The proposed TIA has an input courant noise level of about 21.57 pA/Hz
^0.5
and it consumes DC power of 16 mW from 3.3 V supply voltage.