A 130nm low power Software-Defined radio receiver

A low power Software-Defined radio receiver operating between 400MHz and 1.5GHz is presented, with the property to be robust to out-of-band blockers, thanks to the 4-path passive mixer architecture which acts as a high-Q bandpass filter for RF signals. The filter formed by the mixer at baseband fixes the receiver bandwidth at 10MHz. A common-gate cross-coupled LNA realizes a wideband input matching. The receiver works under 1.2V while consuming less than 10mW. The analog part consumes 4.8mW and the digital part consumes less than 5mW. The receiver has been implemented on a chip and occupies only 0.7mm
²
silicon area.