A robust asynchronous approach for realizing ultra-low power digital Self-Adaptive VDD Scaling system

Self-Adaptive V
_DD
Scaling (SAVS) technique achieves power/energy reduction by dynamically scaling V
_DD
for the prevailing conditions. However, when applied in sub-threshold (sub-V
_t
) region, robustness issues need to be addressed due to the severe delay uncertainty associated with sub-V
_t
Process, Voltage, and Temperature (PVT) variations. To ensure robustness for sub-V
_t
SAVS, we adopt the asynchronous-logic (async) Quasi-Delay-Insensitive (QDI) approach. To address the usual power/energy overheads associated with conventional async QDI systems, we further propose a hardware-simplified version of QDI (`pseudo-QDI') with an easy-to-met implicit timing. Prototype ICs embodying async filter banks realized in both the conventional QDI and pseudo-QDI have demonstrated the extreme robustness of the proposed approach against sub-V
_t
PVT variations. Measurement results further suggest pseudo-QDI's energy (~40% lower) and area (~1.34× smaller) advantages as compared to its conventional QDI counterpart.