WASP: a wafer-scale massively parallel processor

The new decade (1990-2000) heralds the age of very powerful compute-, graphics- and information-servers, based on Massively Parallel Processors (mppS), capable of TOPS (Tera Operations-Per-Second) performance in networked scientific, engineering, knowledge-base and artificial intelligence applications. This paper describes a WSI associative string processor (WASP) in CMOS fault-tolerant WSI MPP architecture which satisfies both the architectural and engineering requirements outlined and, thereby, offers a step-function improvement in cost-effectiveness compared with first-generation MPPs.<
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