A Compact X-Band Bi-Directional Phased-Array T/R Chipset in 0.13 $\mu{\hbox {m}}$ CMOS Technology

This paper presents an X-band bi-directional T/R chipset in 0.13
$\mu{\hbox {m}}$
CMOS. The T/R chipset consists of a bi-directional gain amplifier (BDGA), a 5-bit digital step attenuator with two BDGAs for compensating the switch losses, and a 6-bit phase shifter using DPDT switches. The phase and attenuation coverage is 360
$^{\circ}$
with the LSB of 5.625
$^{\circ}$
, and 31 dB with the LSB of 1 dB, respectively. The circuit has a reference state gain of
${> 3.5}~{\hbox {db}}$
, and the return losses of
${> 11}~{\hbox {db}}$
at 8.5–10.5 GHz. The T/R chipset has a phase shift accuracy with the RMS phase error of
${< 4.3}^{\circ}$
, while the RMS amplitude error is
${< 0.8}~{\hbox {db}}$
at 8.5–10.5 GHz. The attenuation accuracy is measured to be
${< 0.33}~{\hbox {db}}$
, while the RMS phase error is
${< 7.4}^{\circ}$
at 8.5–10.5 GHz. The output P1dB of the T/R chipset is
${> 6.5}~{\hbox {dBm}}$
and the noise figure is
${< 7.5}~{\hbox {db}}$
at 8.5–10 GHz. The chip size is 2.06
$\,\times\,$
0.58
${\rm mm}^{2}$
including pads, and the DC power consumption is 154 mW only in the BDGAs. To authors' knowledge, this is the X-band CMOS T/R chipset with the competitive RF performance compared to other device technologies, which has the smallest size and the lowest power consumption to-date.