Performance analysis of the Slot Counter algorithm in comparison with the real performance of a commercial RFID reader supporting the EPC Class 1 Generation 2 protocol

Radio Frequency IDentification (RFID) technology is increasingly becoming popular, for its widespread use and more sophisticated applications. Any prospect application is preferred to be simulated before implementation. Here, a Slot Counter algorithm (from the EPC Class 1 Generation 2 protocol) is presented, and compared to a commercially available UHF-RFID reader for the validation. For the comparison, the system latency was analyzed. Initial observations establish that the commercial reader uses a diverged Dynamic Framed Slotted Aloha (DFSA) algorithm, instead of the Slot Counter algorithm used by the EPC Class 1 Generation 2 protocol. Therefore, for the realization, we have performed a fair comparison of the simulated Slot Counter and DFSA with measurements.