Hardware-efficient non-decimation RF sampling receiver front-end with reconfigurable FIR filtering

A hardware-efficient non-decimation RF sampling receiver front-end with reconfigurable finite impulse response (FIR) filtering is proposed for multi-band and multi-standard receivers. By adopting a moving average filtering with the charge accumulation, the hardware complexity of the non-decimation filter is only proportional to the number of taps. This makes the proposed non-decimation sampling filter suitable for high-frequency and high-selectivity sampling filters. With a sampling frequency of 1 GHz, a conversion gain of 20 dB and a cascaded NF of 7.5 dB are obtained at the output. The non-decimation FIR filter enhances out-of-band linearity by 10 dB, while suppressing aliasing by 55 dB. The chip is implemented using a 0.18-μm SOI CMOS technology and occupies 0.7 mm
²
.