The influence of source ballast resistance on current spreading in grounded gate nmosts

Three-dimensional TCAD simulations of a grounded gate nmost are presented with emphasis on current spreading. The simulations are validated against TLP-results. Back-injection of holes into the source can reduce current spreading, and the amount of back-injection can be controlled by source ballast resistance. Through this mechanism, insufficient source ballast resistance can be limiting to the ESD performance of ggnmosts of a specific layout style as is shown on silicon.