Abstract:
A 30% frequency tuning range 23.5GHz 32nm SOI-CMOS PLL features an adaptively biased VCO. Adaptive biasing of the VCO lowers the average PLL power consumption from 34mW t...Show MoreMetadata
Abstract:
A 30% frequency tuning range 23.5GHz 32nm SOI-CMOS PLL features an adaptively biased VCO. Adaptive biasing of the VCO lowers the average PLL power consumption from 34mW to 24mW, while keeping the jitter below 1.5° RMS across all frequency bands.
Date of Conference: 09-12 September 2012
Date Added to IEEE Xplore: 15 October 2012
ISBN Information:
Contents 