Design of low-voltage low-power Dual-Band LNA with using DS method to improve linearity

In this paper a low-voltage low-power Concurrent Dual-Band Low Noise Amplifier (LNA) with linearity improvement technique is presented. By using advantageous of current reuse (CR) topology and forward body biasing (FBB) technique the proposed LNA can operate at a reduce supply voltage and power consumption. The liberalized LNA's is achieved using auxiliary transistor and utilizing derivative superposition (DS) method. Using TSMC 0.18um process, the IIP
₃
is improved more than 50%, with the cost of decrease 2dB gain for each band. LNA is designed at 2.4GHz and 5.2GHz for IEEE802.11a/b/g application with 2.89mW power consumption and 0.7V supply voltage.