A high resolution time-to-digital converter on FPGA for Time-Correlated Single Photon Counting

Time-Correlated Single Photon Counting (TCSPC) can provide not only the time information of a photon, but also the photon density information. Based on the conclusion of usual time interval measuring methods, this paper chooses the scheme of Time-to-Digital Converter (TDC) based on delay line structure, meeting the TCSPC system's requirement for high timing resolution. This TDC contains two delay lines and a main counter. After finishing the framework of the TDC using Verilog, we confirm the architecture of the delay element by simulation and on-board test. Using the histogram from FPGA, the TDC system implement is for time resolution below 200 ps.