A 25 GHz analog demultiplexer with a novel track and hold circuit for a 50 GS/s A/D-conversion system in InP DHBT Technology

A novel architecture of a track and hold (T&H) circuit for the realization of a high speed analog demultiplexer is presented in InP DHBT Technology. The architecture allows a sampling rate flexible demultiplexing of an analog input signal. The demultiplexer features a measured THD above 32 dB and a SFDR above 35 dB with a differential input voltage of 0.5V-PP when operating at 25 GHz. This allows the realization of a 50 GS/s analog-to-digital conversion system.