Performance profile of some hybrid heuristic search techniques using compiler flag selection as a seed example

The availability of different flavor of processor architecture coupled with computer codes of various nature poses a discreet challenge to the programmers in forms of code optimization. Programmers need to contemplate on optimization during pre and post implementation to take advantage of the hardware given for a specific nature of the code. To compliment this requirement, the evolution of compiler technology has resulted in built in optimization functionality called compiler flags. Like a switch the flag turns on or off for a particular optimization behavior. The existence of various flags in turn causes confusion as to which flag or combination of flags to be utilized since misuse has detrimental effect on performance. In this work we are performing a comparative study on the utilization of Genetic Algorithm and Simulated Annealing in finding the best compiler flag combination respectively and finally proposing a hybrid algorithm that produces better flag combination in comparison to the former two.