Decoupling optimization for IC-package and PCB systems considering high performance microprocessor core and signal interface interactions

The purpose of this paper is to present a modeling and simulation based efficient DECAP optimization process for high performance microprocessor systems consisting of IC-package and PCB, considering the interactions due to mutual coupling of power delivery networks (PDNs) for core and signal interface, corresponding to multiple power boundaries. Effectiveness of the on-die capacitances and package mounted DECAPS on IC-package and PCB for optimizing the input impedance of multiple PDNs is described and illustrated with several simulation results.