Novel differential sensing for 0.5-V sub-32-nm UTBB FD-SOI SRAMs

A novel differential sensing with gated diode (GD) based bit-line (BL) voltage difference boosting, is proposed for sub-32-nm SRAMs. The non-linear capacitance of GD with the generated current difference conditionally amplifies a BL differential signal in short transition time. The amplification is maximized by the double-gate structure of UTBB FD-SOI used for GD. The small source capacitance of the GD enables fast GD-driving. Simulations of a sub-32-nm 32kb memory with the scheme have shown 3.8 times improvement in performance with read access time of 2.6ns at 0.5V supply voltage.