A dynamically allocated CMOS dual-LIFO register stack

The design of a single vertically shifting VLSI register module that functions as two dynamically partitioned last-in-first-out (LIFO) stacks is presented. The module consists of a tiled array of custom static master-slave storage elements with a simple state machine adjacent to each register word serving as a register allocation controller. The dual-stack module is intended primarily for application in stack-based processor architectures requiring two high-performance LIFO stacks. Simulation results are presented.<
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