System-level power estimation and optimization-challenges and perspectives

Energy considerations are at the heart of important paradigm shifts in next-generation designs, especially in systems-on-a-chip era. Voltage might very well become a variable design parameter. Hybrid architectures mixing a variety of computational models are bound to be integrated on a single die. Exploiting the opportunities offered by these architectural innovations requires a well-thought out design methodology, combining high-level prediction and analysis tools with partitioning, optimization and mapping techniques. The paper presents a plausible composition of such a design environment.