An evaluation to the use of the non-overlapped multiple register sets in the network nodes processor

This work investigates the use of the non-overlapped multiple register sets (NMRS) organization and its effectiveness on the network nodes processor design. Also, different strategies that could be used to manage the use of the NMRS' sets between many waiting tasks have been also evaluated. Four strategies namely; least recently used; frequency; random; and priority, have been investigated and evaluated. We have measured the reduction of the processor-memory traffic that is generated due to the context switching in the NMRS-based processor. Two parameters have been varied under every strategy, the number of tasks and the size of the NMRS. We have found that the impact of these strategies on the average throughput is very small (less than 1%).