Decimation filters: low-power design and optimization

This paper reports on high-level low-power design techniques for a sinc decimation filter. At the heart of these techniques is the minimization of the computational complexity, by the elimination of redundant and irrelevant computations. Proper ordering of the filtering and down-sampling operators can achieve a five times reduction in the computational complexity. The effect of the datapath width optimization on the numerical accuracy and the computational complexity of the sinc decimator is also considered.