Design and performance analysis of shift register-based ATM switch

We present a modified design of the shift register-based ATM switch introduced by El-Guibaly, Sabaa and Shpak (see IEEE ETACOM '96, p.24-7, 1996). The switch design has been modified to perform connection admission control (signalling) and management (OAM) functions. This switch overcomes the HOL and low throughput problems and supports QOS and multicasting functions. The internal details of each module of the switch architecture are presented. Also, a performance analysis of the switch is done to find the cell loss probability and throughput.