Truncated-matrix multipliers with coefficient shifting

Truncated-matrix multipliers offer significant reductions in area, power, and delay, at the expense of increased computational error. These tradeoffs make them an attractive choice for many signal processing systems such as FIR filters. This paper presents a method for shifting coefficients that significantly reduces the error in systems that use truncated-matrix multipliers. This method allows further reductions in area, power, and delay while maintaining the overall accuracy of the system.