Hierarchical modeling and control for re-entrant semiconductor fabrication lines: a mini-fab benchmark

This paper addresses the problem of controlling reentrant semiconductor fabrication lines. To focus the presentation, a virtual five-machine six-step mini-fab is used. This mini-fab developed by Intel in collaboration with ASU is intended to contain all of the features which make a real line difficult to control. Industry-like policies are discussed and compared with control-theoretic hierarchical policies.