Hardware implementation of versatile zigzag-reordering algorithm for adaptive JPEG-like image compression schemes

A hardware implementation of an adaptive technique for reordering of discrete cosine transform (DCT) coefficients, that are used in a variety of transform-based image compression schemes such as JPEG, is described. Efficient reordering is achieved for variable-size rectangular sub-blocks using Boolean operations, that determine the position of the next coefficient to be coded. The algorithm has been developed for implementation in hardware using programmable logic devices (PLDs). The implementation constitutes a Moore state machine with binary inputs representing the number of rows and columns in the sub-block to be reordered. Experimental results are presented which demonstrate the potential advantages of this new technique, in terms of a significant reduction in entropy.