Fabrication of silicon tunnel-FETs using epitaxial NiSi2 Schottky junctions and dopant segregation technique

Tunnel-FET (TFET) is a steep-slope device that functions by the control of band-to-band tunneling (BTBT) current at the source/channel junction. It is expected as one of the ultra-low power devices that replace conventional MOSFETs [1]. Schottky source junction is a practical structure for the fabrication of TFETs when the Schottky barrier height is appropriately maintained. Recently, a promising performance of Si-TFET is demonstrated using NiSi Schottky source with dopant segregation technique [2]. On the other hand, it is pointed out that silicidation sometimes causes encroachment of silicide edges and induces trap-assisted tunneling which degrade the performances of TFETs [3]. Thus a silicidation technology that eliminates defects at the silicide/silicon interface is valuable for the fabrication of Schottky source TFETs. This report presents our exploration of Schottky source TFETs using epitaxial NiSi
₂
.