A 2GHz Tx LO generation circuit with active PPF and 3/2 divider in 65nm CMOS

This paper demonstrates a 2GHz Tx LO generation circuit with 8% tuning range featuring a VCO, an active polyphase filter (PPF), and a 3/2 divider with 50% output signal duty cycle, implemented in a standard 65nm LP CMOS process. The circuit measures a phase noise of -158dBc/Hz at 20 MHz offset frequency, with a power consumption of 29.8mW. It occupies a chip area of 0.53 mm
²
, including pads. The spurious tone at 1GHz, caused by mismatch in the active polyphase filter and frequency divider, is at -50dBc.