Design consideration for folding/interpolation ADC with SiGe HBT

This paper describes the design and performance of a high-speed 6-bit ADC using SiGe HBT for measuring-instrument applications. We show that the Gummel-Poon model suffices for SiGe HBT modeling and then we describe that the folding/interpolation architecture as well as simple, differential circuit design are suitable for ADC design with SiGe HBT. Measured results show that the nonlinearity of the ADC is within /spl plusmn/1/2 LSB, and the effective bits are 5.2 bits at an input frequency of 100 MHz and 4.2 bits at 200 MHz with 768 MS/s. We also describe some design issues for folding/interpolation ADC.