A 14-bit 200-MS/s time-interleaved ADC with sample-time error detection and cancelation

A 14-bit 200-MS/s time-interleaved analog-to-digital converter (TI-ADC) is presented. An adaptively-controlled sampling switch is proposed to correct the sample-time error between two interleaved channels and an auto-correlation-based sample-time error detection algorithm is introduced to detect the sample-time error. A prototype ADC is fabricated in a 0.18-μm mixed-signal CMOS process with a power consumption of 460 mW from a 1.8-V supply. The ADC achieves an SNDR of 68.5 dB and an SFDR of 88.5 dB for a 15.33MHz input.