Model-based design and distributed implementation of bus arbiter for multiprocessors

The contribution of this paper is twofold. First we propose a high-level distributed and abstract model of the bus arbiter for multiprocessors. Our model provides a way for describing several existing arbitration protocols in a distributed and abstract manner so that their properties and performance could be easily compared and analyzed. Second, we propose to automatically verify deadlock freedom property of these protocols and to automatically generate their distributed implementation.