Self-Assembly Process for Array Interconnects Pattern Using Solder/Polymer Hybrid Materials

In the modern packaging technologies highly condensed metal interconnects such as solder bumps, gold studs or copper pillars are typically formed by high-cost processes. These methods inevitably require the precise controls of mutually dependant process parameters, which usually cause the difficulty of the change in the layout design for the interconnects of chip to-chip or chip-to-substrate. In order to overcome these problems, so far, the unique concept and methodology of self-assembly even in micro-meter scale were developed by the author. In this paper the geometry and yielding ratio of vertical and lateral solder bump bridges before self-replication were compared with varying filler content, copper land space and gap space. It was found that the formation of the vertically bridged bump arrays with 100-300 μm space can be achievable.