Multi-step process yield control with large system models

We have assembled an integrated view of the entire via manufacturing process. This integrated study includes five key plasma processes that culminate in the production of vias (contact holes) on CMOS wafers. Using a neural network, we demonstrate that the key processing steps to determine the metal-one metal-two (M1M2) resistance are the thick oxide deposition and the anisotropic via etch. Of lesser significance are the etchback planarization, an isotropic etch and plasma enhanced tetra-ethoxy silane deposition. The numerical value of M1M2 resistance can be predicted ahead of time, before completion of all five processes. This prediction can be done to an accuracy of about 1 Ohm. By using adaptive neural networks, the intelligent agents can modify their predictive behavior with respect to process changes effected by the engineering staff. Our pre-production demonstration suggests that these programs could be used in feedback and feedforward control for production yield.