Design techniques and considerations for ultra-low quiescent current power management IC's

The increasing prevalence of portable systems powered by limited supplies such as batteries or energy harvesting techniques has created a need for ultra-low quiescent current power management. This paper presents design techniques and other considerations for ultra-low (nA or less) quiescent current power management integrated circuits (IC's). Topics presented include a zero mask adder robust analog floating gate implementation and a productized nanoSmart® LDO with 20nA operating Iq.