A 1 V folded common-gate CMOS low noise amplifier for Wireless Sensor Network applications

This paper presents a 1 V folded common-gate CMOS low noise amplifier (LNA) for Wireless Sensor Network (WSN) applications. The LNA uses capacitive cross-coupling common- gate (CG) topology to achieve wonderful input matching and low noise figure (NF). A folded topology is employed to reduce the supply voltage and thus power consumption. A source follower acts as the buffer stage for measurement. The LNA is designed in 0.18 μm RF CMOS technology. For saving the chip area, a differential inductor has been designed, which has high inductance value with a small area. With a 1 V power supply, at 2.44 GHz, the post simulation exhibits a high voltage gain of 15.4 dB, and a low voltage gain of 0 dB, with the input impedance of mixer as the load impedance. At high-gain mode, power gain with S21 is 10.5 dB and NF is 3.8 dB. At low-gain mode, S
₂₁
is -6.4 dB and NF is 7.8 dB. Moreover, IPldB is -19 dBm and 1.4 dBm, at the two modes respectively. The LNA core consumes current about 2.35 mA. The total chip area is 1200 μm×580 μm.