Code optimization method for DSPs with multiple memory addressing registers and its application to compilers

A novel method to derive an efficient memory access pattern for a digital signal processor (DSP) of which memory is accessed only by address registers (ARs), is discussed. In such a DSP, some AR operations are performed very efficiently, and program codes with less overhead in memory accesses are derived by utilizing such AR operations as much as possible. By utilizing multiple ARs, further reduction in overheads in codes is possible. In the existing code optimization method methods, variables in a program are assigned into respective ARs, and then the location of the variables in memory space is decided. Those methods, however, strictly limit the address range accessed by each AR. In this article, a novel AR assignment method is performed for memory access sequence of which the memory location is already settled. The memory re-allocation method, which swaps the location of variables related with overheads, is also studied. The proposed methods are applied to the compiler for /spl mu/PD77230, and resultant codes for several examples are comparable to the existing methods.