Design and implement of a band-pass FIR filter based on FPGA in multi-channel data acquisition system

To filtering the noises interference, a 32-tap band-pass FIR digital filter is designed and implemented on FPGA by applying the principle of distributed algorithm (DA), which is based on Look-Up Table (LUT). My design decreases the quantity of Look-Up Table and achieves high processing speed based on pipelining technology by using the parallel and serial distributed algorithm. Simulation of the FIR filter has been done in the environment of Quarters 8.0 by using VHDL, which is flexible and supported by multi-library.