An FPGA implementation of the asynchronous programmable neighborhood mechanism for WTM Self-Organizing Map

In this paper we present an FPGA-based implementation of the novel architecture of the Kohonen Winner Takes Most (WTM) Self-Organizing Map (SOM) with an asynchronous, programmable neighborhood mechanism. The proposed network is, in general, the synchronous system working in parallel, with some blocks that operate asynchronously. The asynchronous part includes the neighborhood mechanism that ensures the asynchronous spreading of the adaptation enabling signal amongst the neurons neighboring the winning unit. This mechanism is fully programmable and enables runtime adaptation of the neighborhood radius. The overall SOM consists of a controller, the winning neuron selecting unit and the number of neurons that results from the size of the map. The proposed implementation is fully scalable and mostly independent on the size of the map in terms of achievable maximum data rate with only one exception, i.e. the maximum delay introduced by the asynchronous neighborhood mechanism. The delay is linearly dependent on the size of the map. The proposed system has been realized on the Virtex 5 XC5VLX110T device.