Energy efficient Phase Change Memory based main memory for future high performance systems

Phase Change Memory (PCM) has recently attracted a lot of attention as a scalable alternative to DRAM for main memory systems. As the need for high-density memory increases, DRAM has proven to be less attractive from the point of view of scaling and energy consumption. PCM-only memories suffer from latency issues, high write energy, and the problem of limited write endurance. Research in this domain has focused mainly on using various hybrid memory configurations to address these shortcomings. A commodity DRAM module as a cache for PCM memory has emerged as a potential solution. But this method requires use of a separate memory controller and is unable to achieve better performance than a DRAM-only based memory at low energy. We propose a PCM based main memory system design using a small, embedded DRAM (eDRAM) cache to replace the row buffers in the PCM memory chip. This reduces the high latencies of PCM and the energy consumption of the main memory system. Our methodology also eliminates the need for separate memory controllers. Through simulation results, we show competitive performance by reducing average memory access time of a slow PCM based memory and significant energy reductions against a DDR3 commodity DRAM memory system of similar storage size. Our proposed system is highly energy efficient and provides 35.02%improvement in EDP over a DRAM-only system. Our system consumes less energy than the state-of-the-art PCM hybrid system using a commodity DRAM cache.