Low-Voltage Electric-Double-Layer TFTs on $ \hbox{SiO}_{2}$-Covered Paper Substrates

Low-voltage electric-double-layer (EDL) thin-fllm transistors (TFTs) have been fabricated on paper substrates at room temperature. The devices operated in depletion mode, and the resistivity of the Indium-Tin-Oxide (ITO) channel layer is measured to be 24 Ω · cm. An SiO
₂
film deposited by plasma enhanced chemical-vapor deposition method is used as the buffer layer to improve the smoothness of the paper substrate. TFTs on the SiO
₂
-covered paper substrates show a saturation filed-effect mobility of 14.6 cm
²
V
^-1
s
^-1
, a subthreshold swing of 100 mV/dec, and a drain-current on/off ratio of 1.5 × 10
⁶
, which are much better than that of the devices on bare paper substrates. Such EDL TFTs on paper substrates with an SiO
₂
buffer layer have potential application in portable sensors.