VLSI Design and Education Center (VDEC) current status and future plan

VDEC (VLSI Design and Education Center) is an inter-university center placed in the University of Tokyo, which has a mission to continuously promote and support VLSI education programs in Japanese universities, including the nationals and the privates. After briefly reviewing a history of VDEC, its functions and facilities are summarized, followed by future plans of chip implementation along with a network society.